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ESP8266 12E/F I/O interfacing

PostPosted: Wed Jan 17, 2018 2:29 am
by Erik84750
For a ESP8266-12E/F interface board I would like I/O pins to be configurable as either input or as output, with the accompanying required hardware setup.
Therefor an optocoupler CNY17 is used when configured as input, and a N-channel MOSFET when configured as output.
Input- and outputconnectors are separate.
See drawing attached. Is this an acceptable hardware configuration?

Re: ESP8266 12E/F I/O interfacing

PostPosted: Wed Jan 17, 2018 4:38 am
by btidey
Few comments

MOSFET seems to be upside down. Drain is shown connected to 0V. I suspect you are trying for an open drain output.

There is nothing limiting input current to opto. If you are assuming external resistor or a current source that's ok but I would put in at least a limiting series resistor to avoid blowing the opto.

The output would follow the input when used in input mode. That may be OK.

If the GPIO is output and the input turns the opto on then there is a serious conflict. You should have a series resistor from the emitter to limit this. A value of say 2.2K will still allow a good high to be developed on input but limit the current if the opto turns on and GPIO is output low.

Re: ESP8266 12E/F I/O interfacing

PostPosted: Wed Jan 17, 2018 8:53 am
by Erik84750
Hi btidey, thank you very much for your very valid and valuable comments! The schematic will be adapted asap, I will post the full result for your information.

Re: ESP8266 12E/F I/O interfacing

PostPosted: Wed Jan 17, 2018 9:01 am
by Erik84750
btidey wrote:Few comments

MOSFET seems to be upside down. Drain is shown connected to 0V. I suspect you are trying for an open drain output.

(..)

The MOSFET is N-channel, hence lowside: source is connected to ground, drain to load, load to positive.

EDIT: strike through above, you are entirely correct!! MOSFET upside down, will be corrected. Thank you!