ESP8266 Community Forum

After having just rolled my own boards, dutifully following the datashit, I now realize that all the module images I can find have their IO0 (as found in ESP datasheets) switched with IO1, and IO2 with IO3 compared to what can be found in flash datasheets.

Needless to say, I found that out when my board refused to flash...

Compare the pin naming found here: https://github.com/esp8266/esp8266-wiki ... definition
and module images here: wiki/doku.php?id=esp8266-module-family
with almost any Quad-SPI 8-pin or -pad packaged flash datasheet, but particularly W25Q40BVSNIG: http://html.alldatasheet.com/html-pdf/4 ... VSNIG.html

Even the Aug, 2014 HDK Application Design Guide has it wrong.

TL;DR: When making your own board, the flash should be routed like this:

Well they do say "ESP8266EX chip pinout is something like this:"

That really sucks man!

I understand you can also cut the traces or reconfigure the firmware to decrease the quad SPI flash speed to DUAL - have you explored that option?

So these two pins in this diagram should be flipped, correct? (See Attachment) If so, this should go in that wiki page!

IO0 and IO1 too, meaning that I don't even have single-SPI link.

Attached edited pic.

I don't have contributor rights in the wiki, and anyhow, I'd like for someone more knowledgeable to do a sanity check before this goes in the wiki.

I'd already taken off the chip to replace it with one from an ESP module, since I at first thought that perhaps the flash's factory defaults don't make sense to ESP. Of course, I managed to lift, and later while trying to deadbug it, break off the CLK pad. Almost had it done too, dammit. Now I have to wait to get in the lab, and tomorrow is a national holiday, and the deadline is Friday