-->
Page 1 of 1

Any details of the hardware random number generator?

PostPosted: Thu Jan 24, 2019 6:10 am
by ciril
I'm interested in finding out how the internal hardware random number generator works. I've looked through the data sheet to no avail. Consensus on the Interweb seems to be that it uses mysterious noise. Does anyone have any further details? Ideally a schematic of the entropy capture circuit and randomness extractor/whitener please?

I'm fairly convinced that the RNG is not a true random number generator. It's just a pseudo random generator using some sort of algorithm like a posh randu. With the WIFI turned off, the RNG produces random numbers at the rate of ~360 Mbps on mine. And that's after randomness extraction/ whitening and with the alleged entropy source disabled. That's impossible. The generator should simply stop without an adequate entropy supply, as does /dev/random.

This tweet (https://twitter.com/esp8266/status/692469830834855936) suggests as much. It sounds like the RDRAND Intel con, which I kinda understand from a security services perspective. I just wondered if anyone knew the internal mechanism.

Re: Any details of the hardware random number generator?

PostPosted: Wed Jan 30, 2019 1:19 am
by extremity
If you wan t a true random number, use an analog input reading with time clock.

Re: Any details of the hardware random number generator?

PostPosted: Wed Feb 20, 2019 8:34 pm
by ciril
Thanks, that's really helpful...

Re: Any details of the hardware random number generator?

PostPosted: Fri Mar 08, 2019 6:28 am
by eriksl
Also I think the RNG you refer to, works similarly. Amplifying the noise that every sillicon component produces to the full range of an ADC and then sample that. This will give you random numbers in very quick succession, but possible not suited for encryption purposes, because the distribution may not be adequate.