How could i debug a wdt (watchdog timer) reset?
Posted:
Sun May 24, 2015 2:33 amby cal
Moin community,
I would like to debug a wdt reset.
I know that the wdt will fire when the watchdog isn't feed for some time because
CPU is occupied for >1s.
So I have to find out what the cpu is doing before the reset.
I assume the wdt reset is a hardware level reset but I cant't find more information.
Is it possible to catch that reset?
Is it possible to get a kind of warning interrup before?
I thought about a timer or instruction counting interrupt that stores some pc/sp/ps/... registers for reading
after reset.
Does RAM content survive a wdt reset caused reboot?
Do you have any information or experience?
Cal
Re: How could i debug a wdt (watchdog timer) reset?
Posted:
Wed May 27, 2015 11:23 pmby jcmvbkbc
cal wrote:Does RAM content survive a wdt reset caused reboot?
At least some IRAM and DRAM do. I used the following code for testing:
Code: Select allvoid ets_wdt_disable(void);
void ets_wdt_enable(uint32_t mode, uint32_t x, uint32_t y);
static void wait_1s(void)
{
uint32_t cc;
__asm volatile ("rsr %0, ccount" : "=r"(cc));
for (;;) {
uint32_t cc1;
__asm volatile ("rsr %0, ccount" : "=r"(cc1));
if (cc1 - cc > 8000000)
break;
}
}
static void stdoutUartTxd(char c) {
//Wait until there is room in the FIFO
while (((READ_PERI_REG(UART_STATUS(0))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT)>=126) ;
//Send the character
WRITE_PERI_REG(UART_FIFO(0), c);
}
static void stdoutPutchar(char c) {
//convert \n -> \r\n
if (c=='\n') stdoutUartTxd('\r');
stdoutUartTxd(c);
}
void stdoutInit() {
//Enable TxD pin
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
//Set baud rate and other serial parameters to 115200,n,8,1
uart_div_modify(0, UART_CLK_FREQ/BIT_RATE_115200);
WRITE_PERI_REG(UART_CONF0(0), (STICK_PARITY_DIS)|(ONE_STOP_BIT << UART_STOP_BIT_NUM_S)| \
(EIGHT_BITS << UART_BIT_NUM_S));
//Reset tx & rx fifo
SET_PERI_REG_MASK(UART_CONF0(0), UART_RXFIFO_RST|UART_TXFIFO_RST);
CLEAR_PERI_REG_MASK(UART_CONF0(0), UART_RXFIFO_RST|UART_TXFIFO_RST);
//Clear pending interrupts
WRITE_PERI_REG(UART_INT_CLR(0), 0xffff);
//Install our own putchar handler
os_install_putc1((void *)stdoutPutchar);
}
void user_init(void) {
const uint32_t p[] = {
0x3ffe9000,
0x3ffef000,
0x3ffff000,
0x40107f00,
0x40108000,
0x40109000,
0x4010f000,
};
uint32_t tmp, i;
volatile uint32_t *hiram = (volatile uint32_t *)0x3ff00024;
ets_wdt_disable();
stdoutInit();
wait_1s();
ets_printf("\nReady\n");
// *hiram &= ~0x18; // <<<<< Enable upper 32K in the IRAM region
for (i = 0; i < sizeof(p) / sizeof(p[0]); ++i) {
volatile uint32_t *pp = (volatile uint32_t *)(p[i]);
uint32_t v1 = *pp, v2;
++(*pp);
v2 = *pp;
ets_printf("0x%08x: 0x%08x -> 0x%08x\n", p[i], v1, v2);
}
wait_1s();
ets_wdt_enable(4, 0, 0);
__asm volatile ("rsil %0, 15" : "=r"(tmp));
for (;;);
}
UPD added missing functions and (commented out) upper part of IRAM mapping.