ESP8266 I2S
Posted: Mon Dec 21, 2015 11:23 amHi guys,
I'm trying to use the ESP8266-12E to receive I2S data from a TI audio ADC.
I'm basing my approach on the MP3 project that streams I2S to a TI DAC.
The ESP SDK has a driver called i2s_freertos that implements I2S out / DMA.
Very simple, clear code.
But I can't find an I2S register manual for the ESP8266 processor (Tensilica LX106).
Other than changing the RX_... bits to TX_..., I'm not sure how to setup for TX_ (data in).
Also, the code sets up the RX_ (data out) as a slave, which would mean the DAC is doing the clocking. But then they go on to set the frequency of the clock out, suggesting that the ESP is the master.
Does anyone know the jitter specs on the ESP I2S clock? Is it suitable for audio clocking?
Thanks for your time.
I'm trying to use the ESP8266-12E to receive I2S data from a TI audio ADC.
I'm basing my approach on the MP3 project that streams I2S to a TI DAC.
The ESP SDK has a driver called i2s_freertos that implements I2S out / DMA.
Very simple, clear code.
But I can't find an I2S register manual for the ESP8266 processor (Tensilica LX106).
Other than changing the RX_... bits to TX_..., I'm not sure how to setup for TX_ (data in).
Also, the code sets up the RX_ (data out) as a slave, which would mean the DAC is doing the clocking. But then they go on to set the frequency of the clock out, suggesting that the ESP is the master.
Does anyone know the jitter specs on the ESP I2S clock? Is it suitable for audio clocking?
Thanks for your time.