ESP8266 Community Forum

Posted: **Thu Dec 18, 2014 5:25 pm**

Hi guys,

Does anyone know what type of memory the RTC memory is? Seems to me it should be eeprom to survive some erase/write cycles.

When inspecting the assembly for system_rtc_mem_write it seems the memory size is 768 bytes and valid start address for write is word-aligned addresses 0-190. My assembly skillz are a bit rusty but I think I've got it fairly correct... :mrgreen:

Code: Select all

401007cc <system_rtc_mem_write>:
401007cc:   bfa052           movi    a5, 191
401007cf:   123527           bltu    a5, a2, 401007e5 <system_rtc_mem_write+0x19>
401007d2:   370c             movi.n  a7, 3
401007d4:   146030           extui   a6, a3, 0, 2
401007d7:   a6cc             bnez.n  a6, 401007e5 <system_rtc_mem_write+0x19>
401007d9:   1192e0           slli    a9, a2, 2
401007dc:   00a382           movi    a8, 0x300
401007df:   c08890           sub     a8, a8, a9
401007e2:   03a847           bge     a8, a4, 401007e9 <system_rtc_mem_write+0x1d>
401007e5:   020c             movi.n  a2, 0
401007e7:   f00d             ret.n

A little further down I think we have the actual RTC start address 0x40100128, just above the memory write loop:

Code: Select all

40100850:   fe3671           l32r    a7, 40100128 <wdt_feed+0x7c>
40100853:   040c             movi.n  a4, 0
40100855:   a05420           addx4   a5, a4, a2
40100858:   a06430           addx4   a6, a4, a3
4010085b:   557a             add.n   a5, a5, a7
4010085d:   0020c0           memw
40100860:   c02552           l32i    a5, a5, 0x300
40100863:   0020c0           memw
40100866:   0659             s32i.n  a5, a6, 0
40100868:   441b             addi.n  a4, a4, 1
4010086a:   744040           extui   a4, a4, 0, 8
4010086d:   e43487           bltu    a4, a8, 40100855 <system_rtc_mem_read+0x35>

If the RTC start address above is correct, it points into the instruction ram? Or am I being fooled by the l32r instruction somehow?

I did some testing and indeed it is possible to write to address < 191. And it stays there over restart, or least I found 12 bytes starting at addr 144 that was usable without causing any side effects.

Anyone know more on this topic? It would be good to know if the RTC memory is indeed eeprom. That way it could be possible to use to store a counter in RTC mem instead of wearing out the flash.

Cheers!

Posted: **Wed Dec 31, 2014 8:12 pm**

The instruction:

l32r a7, 40100128

that you refer to is actually loading the data that is at the address 40100128 and putting it in a7. This probably points to rtc ram. I don't have system_rtc_mem_write in my dissasembly, not sure why. I tried writing and then reading memory locations in the 0x60000600-0x600007ff range while doing deep sleep cycles but they don't seem to persist. Also looked for any RTC counters in this range that count up or down but didn't find any, unless they are 16 bit. Has anyone figured out if there really is RTC RAM that survives deep sleep and it's address? Actually I'd take any address I can write to that survives a deep sleep cycle

Rick

Posted: **Thu Jan 01, 2015 3:48 pm**

Think I figured out at least some of the RTC RAM mystery. This disassembly chunk shows the RTC memory backup routine:

Code: Select all

40243484 <rtc_mem_backup>:
40243484:   c09320           sub   a9, a3, a2
40243487:   893b         addi.n   a8, a9, 3
40243489:   b38990           movgez   a8, a9, a9
4024348c:   218280           srai   a8, a8, 2
4024348f:   881b         addi.n   a8, a8, 1
40243491:   889c         beqz.n   a8, 402434ad <rtc_mem_backup+0x29>
40243493:   f37a31           l32r   a3, 4024027c <wdt_init+0xac>
40243496:   a07820           addx4   a7, a8, a2
40243499:   343a         add.n   a3, a4, a3
4024349b:   0020c0           memw
4024349e:   0248         l32i.n   a4, a2, 0
402434a0:   0020c0           memw
402434a3:   806342           s32i   a4, a3, 0x200

.....

4024027c:   000e00           excw
4024027f:   24cc60           extui   a12, a6, 12, 3

The instruction "l32r a3, 4024027c" is getting 0x60000e00 from the address 4024027c and then adding 0x200 to it to get to the RTC RAM. So it appears that the RAM starts at 0x60001000. I'm able to read and write from this area but oddly only one byte seems active per 32 byte entity. IE. If I byte write 0x55 to 0x600010ff, a 32 bit read of 0x600010fc gives 0x55555555. It sort of looks like the first 30 or so entities of RTC RAM are used so I put my byte at 0x600010ff.

Rick

Posted: **Tue Jan 06, 2015 3:44 pm**

Yes, it seems it loads 0x60000e00 from 0x40100128, I checked the disassembly. Thanks for explaining the l32r instruction!

I found the RTC memory explained at bbs.espressif.com, see post http://bbs.espressif.com/viewtopic.php?f=7&t=68&p=303&hilit=LIGHT_SLEEP_T#p292.

So now we know how the RTC is supposed to work and where it is mapped, that's great.

Cheers!

ESP8266 Community Forum

RTC memory

RTC memory

Re: RTC memory

Re: RTC memory

Re: RTC memory