ESP8266 Community Forum

- Tue Sep 07, 2021 8:28 am #92228 Already impressive!

I hope you can, at some point, work out what the baud rate actually is for a certain pair of clock settings.

Maybe you can use autobaud'ing. I have a software oscilloscope that can work out the actual baud rate from some bytes of input.

- Tue Sep 07, 2021 8:30 am #92229 Did you already work out what the parameters of the function actually mean? I think one of them is the I2C address (if it really uses I2C internally), one of them the sort of command (eg. write, read, write+read, the amount of bytes to send, the amount of bytes to read and one of them the actual (I2C) register. 103 could be a valid I2C address (must be 7 bits and some ranges are excluded, but this one is valid).

- Tue Sep 07, 2021 12:59 pm #92231 Currently i map all registers from 0x00 to 0xBF, all is realy stranger, i will share a CSV in few hours with all the data, but until now, the highest frequency that i found was 178 MHz stable on the PLL, so we can do 356 MHz of core clock, thats a 10 MHz improve from the last frequency founded by Charles in the original nosdk8266 code! But when the registers pass 0xA... the things become stranger.

- Tue Sep 07, 2021 1:03 pm #92232

Did you already work out what the parameters of the function actually mean? I think one of them is the I2C address (if it really uses I2C internally), one of them the sort of command (eg. write, read, write+read, the amount of bytes to send, the amount of bytes to read and one of them the actual (I2C) register. 103 could be a valid I2C address (must be 7 bits and some ranges are excluded, but this one is valid).

Yes, i find it on a old Charles note on the https://github.com/cnlohr/esp8266oddclock repo, the 103 is an address, the 1 or 2 are possitions, if you use the number one, you set the PLL divider, if you use number 2, you set core divider. the last parameter is the actual value (the ones that im mapping)