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Memory Layout
Posted:
Thu Aug 28, 2014 12:52 pmby scottgibson
The linker file from the examples is here:
https://github.com/scottjgibson/esp8266 ... .app.v6.ldSo it has 200kb of ROM (for permenant library functions); 32kb sram; 80kb dram.
All the library functions here:
https://github.com/scottjgibson/esp8266 ... addr.v6.ld
Re: Memory Layout
Posted:
Thu Aug 28, 2014 12:53 pmby RichardS
Very nice, a little 32 pin IC, and its all in there.... even the DRAM, gotta like that!
Richard.
Re: Memory Layout
Posted:
Wed Sep 03, 2014 8:09 amby obvy
Just to state the obvious, the "DRAM" in esp8266 is not that DRAM which one treats as counterpart of SRAM. Xtensa, just as most other RISC CPUs is based on Harvard architecture with separate instruction and data buses, and RAM blocks attached to them. That's "iram" and "dram" in Xtensa terms. They both are mapped into flat 32-bit address space. And they both are of course implemented as static RAM (SRAM).
Re: Memory Layout
Posted:
Wed Sep 03, 2014 8:18 amby obvy
Anyway, the main question is confirming that the ESP8266 indeed has internal ROM, then confirming what kind of ROM it is. Is it truly a mask ROM which can never be changed. Next step is confirming how application code from external SPI FlashROM is bootloaded. And the heck, the very first step is figuring out which size in KBytes the FlashROM on modules has. Please someone run available module photos thru Gimp to figure that out (I miss time to that myself for now).