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Preventing RX buffer overflow on the ESP8266

PostPosted: Wed May 13, 2015 3:08 pm
by Mlagma
Yesterday I posted a question about generating interrupts when the UART buffers are full/empty on the ESP8266 (This is the link: http://www.esp8266.com/viewtopic.php?f=6&t=3042). Ideally, I would like to figure out a way to invoke this behavior, but I believe I figured out a work around for the time being.

When my uC is receiving data, I can set up an internal interrupt that pulls the data out of the register and into a software buffer - which would be simple to implement. My concern is in regard to the RX buffer on the ESP8266. My uC is considerably faster than the ESP8266, and I'm concerned about overwriting data in the buffer. I can certainly slow down the baud rate, but I would like to make it as fast as possible.

That said, does anyone know how quickly the data is transmitted once the module receives data? My module is running the NodeMCU Lua Interface, so everything is in terms of the API defined on their GitHub page. Unfortunately, I didn't see a function to check the TX/RX buffers.

Re: Preventing RX buffer overflow on the ESP8266

PostPosted: Thu May 14, 2015 2:53 am
by cal
Moin,

if you want that level of access take a look at the uart code of nodemcu on c level.

Cal

Re: Preventing RX buffer overflow on the ESP8266

PostPosted: Fri May 15, 2015 9:21 am
by eriksl
You didn't mention nodemcu in the subject ;-)

Yes, the UART seems to have a few interrupts that can be triggered on fifo empty, fifo data timeout ("TOUT"), fifo full and error. Unfortunately there is no proper datasheet of the UART operation, but the example code from espressif gives some things away. I've managed to take it down to the bare necessesities in my basic transparent bridge implementation: https://github.com/eriksl/esp8266-basic-bridge (which is based on the transparent bridge from beckdac, but a bit easier to grasp, imho).