pvvx wrote:cal wrote:Do you know if 16k is the smallest block size?IRAM 4x16k blocks = 64k.
Do you know if that memory is fixed for "code" or can it be used to cache flash as "data", too?
block = Code, R/W, ALIGN(2(?))... https://github.com/pvvx/esp8266web/blob ... ash.c#L274
Yes, I saw that c-version of yours when you posted the link to the source in another thread and noticed that I wanted
to compare your de-compiled with mine.
What you called "DPORT_BASE[3]" I called "CACHE_CTRL" and find that more readable.
Information about
block = Code, R/W, ALIGN(2(?)
I hoped to find in my de-compilation but can't identify it.
For me it looks like some etch-triggered registers.
Maybe organized in two levels where one register gets set a value
and the second controls what to use if for or.
In extensa CPU world "code" would imply alignment of 2^2 so it may not be present at all.
Hmm now I notice you added 2 comments.
Maybe "DPORT_BASE[3]" / "DPORT_BASE[9]" something like CACHE_CTRL/CACHE_SELECT?
Cal