ESP8266 Community Forum

- Wed Nov 19, 2014 3:58 pm #2943

Yes, I'm using the flash address not the irom address.

To be 100% clear: If my irom is at (eg) 0x40240000 and I do:

spi_flash_write(0x40000, ...)

This function will fail and trigger a watchdog reset.

nb. I can write to other areas of the flash, no problem. It's only address from 0x40000 and upwards that fail.

ISTR that there is some function to disable the caching/access to the flash for program code, so that a program can actually write to it. Of course, all the code accessing/writing the flash then has to be in RAM (or at a totally different location in flash). After all, when you write the flash you don't want it to be interrupted by read accesses for program code. However, i forgot where i saw that piece of code...

Greetings,

Chris

- Mon Nov 24, 2014 4:32 pm #3262

ISTR that there is some function to disable the caching/access to the flash for program code, so that a program can actually write to it. Of course, all the code accessing/writing the flash then has to be in RAM (or at a totally different location in flash). After all, when you write the flash you don't want it to be interrupted by read accesses for program code. However, i forgot where i saw that piece of code...

Greetings,

Chris

Probably you saw this in the upgrade_lib.c they provided some time ago.
But it reads like this, so it's not used (anymore?):

Code: Select allLOCAL bool system_upgrade(uint8 *data, uint16 len)
{
    // os_printf("[%s]: called with len: %d", __func__, len);

    bool ret;
    // Cache_Read_Disable();

    ret = system_upgrade_internal(upgrade, data, len);

    Cache_Read_Enable(0, 0, 1);
    // os_printf("[%s]: retruning: %d\n", __func__, ret);

    return ret;
}

- Mon Nov 24, 2014 4:40 pm #3264 Topic moved to "General Discussions"

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