Question Re SRAM

Use this forum to chat about hardware specific topics for the ESP8266 (peripherals, memory, clocks, JTAG, programming)
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Re: Question Re SRAM

By RichardS
- Sun Nov 09, 2014 1:24 pm #2377 Searched SRAM LAYOUT and this is the first post, may not be the best answer, but it a great start!

viewtopic.php?f=5&t=9&p=1538&hilit=sram+layout#p1538

Richard.
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Re: Question Re SRAM

By gbm
- Mon Nov 10, 2014 3:58 pm #2440
tinhead wrote:everything has been already said, and it is docummented as well, there is no need to guess anything.


I really feel better now, knowing that everything has already been said and it's documented. Unfortunately that doesn't bring me any closer to the information I'm trying to find for over 10 days. Could you please share some links/sources on memory layout and usage rules? So far the most detailed info is that there is some cache through which the SPI Flash is accessed and there is some RAM on unspecified size, from which some 35 KiB is useable. Slightly too little for me, an old engineer, to do some serious software development.
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Re: Question Re SRAM

By Squonk
- Mon Nov 10, 2014 4:59 pm #2447 I am an old engineer, but I don't care about any serious developments!

Just joking :mrgreen:

But this chip is really on the edge: it is the first ever SDIO slave WiFi single chip turned into a standalone or UART DCE device.

It is the first WiFi solution to go below $5.

But it is coming from China, not from an established Western manufacturer. As such, English documentation is rather sparse, but image things the other way around: how about translating your English documents into Chinese :?

If you want to have fun and join the party, you will have to do with these problems, and accept badly translated datasheets, badly written code with unclear license, contradictory information or lack thereof...
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