- Mon Jun 13, 2016 1:34 pm
#49136
Yes ! Don't throw away PCB immediately, cutting the trace will make you losing only one I2C connector, the others will still work.
- Mon Jun 13, 2016 2:44 pm
#49143
The short between sda and scl is unfortunate but can't be the reason for a fried regulator ...
The vias for rst and chpd are very unfavourably placed, much to close to other solderpads of the esp.
Most likely you get a short between the via for chpd and gpio15 solderpad.
Also the via middle under the esp is prone to contact vias on the esp itself.
The vias for rst and chpd are very unfavourably placed, much to close to other solderpads of the esp.
Most likely you get a short between the via for chpd and gpio15 solderpad.
Also the via middle under the esp is prone to contact vias on the esp itself.
- Mon Jun 13, 2016 6:47 pm
#49150
Probably unrelated to the regulator issue as well: the VCC trace on the top side runs dangerously close to the data pin of the lower left port, same goes for the via on the top left of the bottom side image.
You should run a design rules check in your PCB editor and fix all clearance issues reported.
If you have another run at the board anyway, you should also use thicker traces for VCC and GND.
Also if you rotate all those I2C and data port pin headers by 90°, you will have a much easier time connecting them since all pins with the same signals will be adjacent.
You should run a design rules check in your PCB editor and fix all clearance issues reported.
If you have another run at the board anyway, you should also use thicker traces for VCC and GND.
Also if you rotate all those I2C and data port pin headers by 90°, you will have a much easier time connecting them since all pins with the same signals will be adjacent.
- Mon Jun 13, 2016 7:08 pm
#49151
Absolutely ! It will avoid many power issue that ESP surge can cause, makeing sure decoupling caps are as near as possible to the module.
Yes ! Of course ! Especially if layers count are limited.
lethe wrote:If you have another run at the board anyway, you should also use thicker traces for VCC and GND.
Absolutely ! It will avoid many power issue that ESP surge can cause, makeing sure decoupling caps are as near as possible to the module.
lethe wrote:Also if you rotate all those I2C and data port pin headers by 90°, you will have a much easier time connecting them since all pins with the same signals will be adjacent.
Yes ! Of course ! Especially if layers count are limited.
