ESP8266 Community Forum

- Mon Jul 30, 2018 9:37 pm #77496 I am trying to send a signal to my ESP8266 from another MCU. The ESP has an interrupt tied to a pin falling edge. The line is help high with an external pull up. The MCU sending the signal is an ATtiny85. It pulls the line low to send the signal (digitalWrite, pin, LOW).

The question is : should the Attiny hold the pin high in addition to the external pull up (digitalWrite, pin , HIGH) when NOT sending a signal, or is OK to not define any mode and just pull low when needed?

I don’t want the external pull up to back feed into the attiny and hose things up.

Thanks,

Dave

- Tue Jul 31, 2018 4:49 am #77498 Providing the pull up is a sensible value (e.g. 10K) there is no danger that it can cause any damage whether the MCU is in input or output mode.

There is a small risk if your ESP8266 code went haywire and set its interrupt pin into output mode and sent out a signal in conflict with the output signal from the MCU. You could guard against this by putting a lower value resistor (e.g. 1K) in series between the two which still allows the MCU to pull it low but limits any current to a safe value.

With that in mind I would program the MCU pin into OUTPUT mode permanently and then pulse it low when an interrupt is required. During set up it is good to do a digitalWrite on the MCU pin to set it high before setting its pinMode. That prevents any low glitch.

- Tue Jul 31, 2018 10:04 pm #77518 Dave,

As BTidey says, well chosen resistors will usually work without issues. If your attiny is a 5v processor, you might want to use a buffer between it and the ESP, though. A good choice in this case would be a cheap, PNP transistor configured as an emitter-follower (the collector goes to ground, the emitter is connected to your ESP interrupt bit -and- to the ESP 3v3 supply via a 10k pull-up and the base is connected via something like a 4k7 to the attiny pin).

This is a non-inverting buffer, so you're still looking for a falling edge at the ESP interrupt pin. The resistor between the attiny pin and the transistor base limits the current -but- with this configuration you should definitely configure the attiny pin as a digital output with pull-up enabled (if such a thing is valid on an attiny) and specifically pull it high (thus holding the PNP transistor off) when not actually triggering your interrupt.

-John-