ESP8266 Community Forum

- Sat Sep 06, 2014 7:57 pm #278 Maybe it is a unicorn, tracing through all of these IFDEFs in the config file looks like the full MMU actually isn't turned on. But that would have been a cool little chip to use page faults to map from flash.

So how much flash and how much RAM is there?

Where I get my modules

- Sat Sep 06, 2014 8:12 pm #280 The poor thing doesn't even have register windows - the definiteve trait of Xtensa arch, how could it have MMU? And why use MMU to map flash if minimally-sized FIFO (say, 16 bytes) in "smart flash controller" should provide adequate enough performance for linear execution from serial flash (it starts to break down when you jump around, but it's the same problem for caches without good branch predictors).

So, RAM sizes stay the same as reported by CNX et al. - they come from link script, and can be wrong only if vendor lies to linker. So, 80K for data buffers and 32K for executable code. As for ROM, there's also that 64K, and there's that mapped SPI Flash. How much of it's actually mapped and accessible - depends. We have on hands dump of 512K size. But then people said there can be bigger flash chip - and smaller, too. So, there's still a lot to find, and all the above is just hypothesis, which I'd love to be proven or disproven. For me at least, puzzle pieces look falling into places.

- Sat Sep 06, 2014 8:36 pm #283 Docs I've seen says it only supports 512KB or 2MB flash chips.

Where I get my modules

- Sun Sep 07, 2014 3:18 am #287

We have on hands dump of 512K size. But then people said there can be bigger flash chip - and smaller, too.

I can't find the place listing the different Flash memory sizes.

Are you sure there are some smaller sizes, or different than 512K and 2M?