- Mon Aug 24, 2015 2:31 pm
#26969
Yes, only on silkscreen, GPIO5 is above the GPIO4, just under RxD, newer modules have silkscreen coreected.
Yes, EN and CH_PD means the same time, it must be pulled up to VCC.
IPX connector ? do you have PCB antenna too or Ceramic ?
Because I'm not aware of any ESP-12 or ESP-12E with IPX. Are you sure it is not ESP-07 with Ceramic ?
Anyway, they have all the same pinout ...
Linkage problems ? do you mean linker's error ? what kind ? which framework are you using ?
Some Pin definitions can be found on Wiki :
wiki/doku.php?id=esp8266_gpio_pin_allocationsOther pins are explained in the PDF Specsheet above.
For Normal Execution boot mode, RES pulled-up, GPIO15 should be pulled-down, GPIO2/GPIO2 pulled-up, CH_PD pulled-up.
For Upload mode, save as above except GPIO0 pull-down while RES grounded momentarily.