I'm in the process of writing a hardware abstraction tool for the ESPs. In fact, I already have one version available a few Atmel AVRs and I'd like to be able to use the same approach for programming with the ESPs as I do not want to play with bits, masks and shifts anymore and also because it makes the source code far more readable. For those interested, it is here: https://github.com/duparq/hwa.
After a few hours of investigation on how do the GPIOs work, I've arrived to a question about the definition of the PIN_FUNC_SELECT().
What causes me troubles is that the document http://esp8266.ru/esp8266-pin-register-strapping displays 5 possible functions per pin, being coded from 0 to 4. That requires 3 bits.
In the file eagle_soc.h, we can find:
#define PERIPHS_IO_MUX_FUNC 0x13
that let's suppose that the function is actually coded into a 3-bit value with the highest not consecutive to the others.
So, in the definition of PIN_FUNC_SELECT():
#define PIN_FUNC_SELECT(PIN_NAME, FUNC) do { \
WRITE_PERI_REG(PIN_NAME, \
READ_PERI_REG(PIN_NAME) \
& (~(PERIPHS_IO_MUX_FUNC<<PERIPHS_IO_MUX_FUNC_S)) \
|( (((FUNC&BIT2)<<2)|(FUNC&0x3))<<PERIPHS_IO_MUX_FUNC_S) ); \
} while (0)
do not you think that (FUNC&BIT2)<<2 should be (FUNC&BIT2)<<4?
Best regards.