- Fri Feb 27, 2015 10:12 pm
#10949
@Sprite_tm: This is awesome man. I have made a version that moves the debug to Uart1 (sort of) and enables the AT command set from 0.9.4, but I had a few questions regarding the memory layout. As I look at the makefile, etc, it looks like the app gets flashed to 0x00000 (.text, .data, .rodata) the espfs is at 0x12000 and the second part of the app (is irom0.text just the api?) is at 0x40000.
In my case, the 0x00000.bin file is ~40k, the 0x40000.bin is ~160k and the espfs is small ~10k.
I was looking at the memory map at
https://github.com/esp8266/esp8266-wiki/wiki/Memory-Map and note that:
Code: Select all00000h 4k boot.bin Bootloader
01000h 64k app.v6.flash1.bin User application, slot 1
11000h 180k app.v6.irom0text1.bin SDK libraries, slot 1
3E000h 8k master_device_key.bin OTA device key
40000h 4k Unused
41000h 64k app.v6.flash1.bin User application, slot 2
51000h 180k app.v6.irom0text1.bin SDK libraries, slot 2
7E000h 8k blank.bin Filled with FFh. May be WiFi configuration.
Why is the FW image not kept as one image flashed at 0x00000 and move the espfs to 0x52000? That would allow for the same storage sizes but would make it much easier to scale the webroot/program space based on the individuals needs (flash web root at 51000 or 48000. Does the cpu expect something special at those offsets?
I would like to try to add in an OTA update function, but I need to get the app to fit one app block contiguously. The other half would contain the webroot and would get flashed after the first reboot (post update). This would also allow for updating of just the web portion OTA (great for development). Any reason that you are aware of that this is impossible (or highly unlikely)?