martinayotte wrote:Yes, but I think is mentioning what is written after the Table 6 in 3.1.1 :Code: Select allAll digital IO pins are protected from over-voltage with a snap-back circuit connected between the
pad and ground. The snap back voltage is typically about 6V, and the holding voltage is 5.8V. This
provides protection from over-voltages and ESD. The output devices are also protected from
reversed voltages with diodes.
But we should NEVER rely on that, since this will short circuit the output from the other devices ...
I don't think so, unless I am misunderstanding what you are saying.
the current does not ramp up till the snap back voltage at 5.8v.
have a look at the graph on bottom left page 122 here .. Id remains low till Vd is well over 5V
http://www.fujitsu.com/downloads/MAG/vol39-1/paper14.pdf
The main problems with normal ESD input protection is the latch up issue, the lifting of the Vdd above max due to ESD diode forward bias and possible pin overcurrent due to the same diode, if all of these problems go away with a different input electronics, why can't it be relied upon ?
It appears that even just a series resistor should be sufficient protection instead of a full voltage divider to at least protect against device damage.
In my own case I will use a voltage divider or a proper 3.3v interface, but we have many non electronics types using this device however with no access to soldering irons and resistors handy, I keep seeing the same info saying 5v will kill the device and it CANNOT be used with 5v data, I would like to be able to offer both sane and correct advice wherever possible. Hence the fact checking thread