- Sat Oct 07, 2017 5:45 pm
#70695
In general, hi end processors, although having high speed clock capability, they are not optimized for fast handling the I/Os, since the pipeline of the fetched instructions implies on a latency to execute each command, depending on how it were implemented in firmware and optimized by compiler. In addition, even having for example 80MHz clock, it is not the same for all the the CPU, there is one clock for the core and another for peripherals. In general, fast response to these architectures is achieved through hardware resources such as specific peripherals. Note that the I/O mapping for this uC is very strange, it is not a simple bit-oriented access, but it has to mask and shift a lot of stuffs. There are people complaining the same issue with Cortex cores, achieving ridiculous speed for a blinking led application, but there is no way, for faster response, smaller arquictetures...
"part of the world that you live in, you are the part that you're giving" - Renaissance