I'm trying to see if I can interface an SGTL5000 I2C chip. This one is a bit more complex than the ones used in the I2S examples I'm looking at. The main problem is the use of a master clock that is a multiple of the sample rate.
I was looking through the pin maps, functional spec, data sheet, and headers in a non-OS SDK project.
It looks like I can get the system clock on GPIO0.
In pin_mux_register.h, I also see FUNC_CLK_XTAL shared with the GPIO4 pin, FUNC_CLK_RTC shared with the GPIO5 pin, FUNC_CLK_XTAL_BK shared with GPIO3, and FUNC_CLK_RTC_BK shared with GPIO1.
The XTAL signals seem self explanatory and I assume they are a clock at the crystal's frequency.
But what about the FUNC_CLK_RTC signals? I can't find any information about what speed that clock runs at.
The IC also has an asynchronous mode where it can derive a bit and word clock, but I think the IC becomes the master and the ESP8266 would need to become a slave. I'm trying to not diverge too far from the I2S examples I have now and I'd prefer to not try to figure out running in slave mode.
I'm interested in this I2C chip because it supports both line in, line out, has sample code out there, and I can find it attached to a breakout board for prototyping.
Is there solid info on what I can expect on these clock lines?