ESP8266 Community Forum

- Sun Jul 01, 2018 12:11 pm #76766

I thought there is an internal pullup to GPIO0?

Not in the ESP-12F. There is a 12K in the ESP-12S.

I think he ment "internal" as "on chip" which seems to be true for gpio0/2 at least during boot

- Sun Jul 01, 2018 12:16 pm #76767 Indeed "on chip": so there is an internal pullup to GPIO0? During boot this pin must be high, when programming this pin must be tied to 0V so I assume that internally this pin is pulled high..

It is never too late to learn

- Sun Jul 01, 2018 3:03 pm #76769 did you ever have a look at espressif datasheets?
did you see comparable relevant information in any?
obviously not even people hired for working on "technical relations" get this indormation
(or else igrrr wouldnt have to resort to trial and error on most things hw)

BUT: there was a thread where some guy traced the behaviour of every pin before, during and after reset and this suggest there may be something like weak pullups on gpio0/2 and rst

but it definitely wouldn't be "best practice" to rely on them ...

- Sun Jul 01, 2018 3:17 pm #76770 Hi, what do you define as a "weak" pullup?

It is never too late to learn